Designing with the Versal ACAP: Network on Chip

This course introduces the Versal™ ACAP network on chip (NoC) to users familiar with Xilinx devices. Besides providing an overview of the major components in the Versal device, the course illustrates how the NoC is used to efficiently move data within the device.

The emphasis of this course is on:

• Enumerating the major components comprising the NoC architecture in the Versal ACAP
• Implementing a basic design using the NoC
• Configuring the NoC for efficient data movement

See also

• Xilinx training schedule and registration
• ACAP-NOC:  Designing with the Versal ACAP: Network on Chip course description