Designing with the Zynq UltraScale+ RFSoC

This course provides an overview of the hard block capabilities for the Zynq® UltraScale+™ RFSoC family with a special emphasis on the RF Data Converter and Soft-Decision FEC blocks.

The focus is on:

• Describing the RFSoC family in general
• Identifying applications for the RF Data Converter and SD-FEC blocks
• Configuring, simulating, and implementing the blocks
• Verifying the RF Data Converter on real hardware
• Reviewing power estimation to help identify the power demands of the RFSoC device in various operating modes
• Identifying proper layout and PCB considerations since the Zynq UltraScale+ RFSoC is both a high-speed and an analog and digital device

What's New for 2022.1

• General
• Update to Gen3 devices
• DFE devices added
• Labs updated to 2022.1 software

• Frequency Planning Modules
• New Frequency Planner tool
• Practice targets the new tool

• Data Converter Practice
• Updated to 2022.1 software
• RF data converter design example supported in ILT version only (requires 2020.1 software)

See also:

• CONN-RFSoC: Designing with the Zynq UltraScale+ RFSoC
• Xilinx training schedule and registration