Designing with the 7 Series Families

Learn how to effectively utilize and properly design for the primary architectural resources found in 7 series devices.

The focus is on:

• Utilizing 7 series CLB, clocking, memory, DSP, and I/O resources
• Describing the dedicated hardware resources available (PCI Express® technology, analog-to-digital converters, and gigabit transceivers)
• Employing proper HDL coding techniques to get the most out of device resources

This course supports both experienced and less experienced FPGA designers who have already completed the Designing FPGAs Using the Vivado Design Suite 1 course.

See also:

• FPGA-7SERIES:  Designing with the 7 Series Families course description
• FPGA-VDES1:  Designing FPGAs Using the Vivado Design Suite 1 course description
• Xilinx training schedule and registration